35 search results - page 2 / 7 » Configuration bitstream compression for dynamically reconfig... |
FCCM
1999
IEEE
13 years 11 months ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
ARCS
2005
Springer
14 years 1 months ago
2005
Springer
Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting...
ARCS
2006
Springer
13 years 11 months ago
2006
Springer
Today's FPGAs (Field Programmable Gate Arrays) are widely used, but not to their full potential. In Virtex series FPGAs from Xilinx a special feature, the dynamic and partial...
ICES
2005
Springer
14 years 29 days ago
2005
Springer
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...