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» Configurational Workload Characterization
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IPPS
2007
IEEE
14 years 2 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
MASCOTS
2001
13 years 9 months ago
A Modular, Analytical Throughput Model for Modern Disk Arrays
Enterprise storage systems depend on disk arrays for their capacity and availability needs. To design and maintain storage systems that efficiently satisfy evolving requirements, ...
Mustafa Uysal, Guillermo A. Alvarez, Arif Merchant
SAC
2010
ACM
13 years 8 months ago
Load forecasting applied to soft real-time web clusters
Dynamic configuration techniques such as DVFS (Dynamic Voltage and Frequency Scaling) and turning on/off computers are well known ways to promote energy consumption reduction in w...
Carlos Santana, Julius C. B. Leite, Daniel Moss&ea...
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
13 years 5 months ago
A Predictive Model for Dynamic Microarchitectural Adaptivity Control
Abstract--Adaptive microarchitectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resou...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
EUROSYS
2007
ACM
13 years 9 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...