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TIT
2010
111views Education» more  TIT 2010»
13 years 5 months ago
Designing floating codes for expected performance
Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, ...
Flavio Chierichetti, Hilary Finucane, Zhenming Liu...
NIPS
2008
13 years 11 months ago
Effects of Stimulus Type and of Error-Correcting Code Design on BCI Speller Performance
From an information-theoretic perspective, a noisy transmission system such as a visual Brain-Computer Interface (BCI) speller could benefit from the use of errorcorrecting codes....
N. Jeremy Hill, Jason Farquhar, Suzanna Martens, F...
ICC
2007
IEEE
106views Communications» more  ICC 2007»
14 years 4 months ago
Hybrid-ARQ Code Combining for MIMO Using Multidimensional Space-Time Trellis Codes
— A hybrid automatic repeat-request (ARQ) code combining scheme employing different multidimensional spacetime trellis codes (MSTTCs) over a multiple-input, multipleoutput (MIMO)...
Zhihong Ding, Michael Rice
CORR
2010
Springer
101views Education» more  CORR 2010»
13 years 10 months ago
On a Low-Rate TLDPC Code Ensemble and the Necessary Condition on the Linear Minimum Distance for Sparse-Graph Codes
Abstract-- This paper addresses the issue of design of lowrate sparse-graph codes with linear minimum distance in the blocklength. First, we define a necessary condition which need...
Iryna Andriyanova, Jean-Pierre Tillich
CORR
2006
Springer
89views Education» more  CORR 2006»
13 years 10 months ago
Design of Rate-Compatible Serially Concatenated Convolutional Codes
Recently a powerful class of rate-compatible serially concatenated convolutional codes (SCCCs) have been proposed based on minimizing analytical upper bounds on the error probabil...
Alexandre Graell i Amat, Fredrik Brannstrom, Lars ...