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TCAD
2002
139views more  TCAD 2002»
13 years 7 months ago
Digital filter synthesis based on an algorithm to generate all minimal signed digit representations
In this paper, the authors propose an algorithm to find all the minimal signed digit (MSD) representations of a constant and present an algorithm to synthesize digital filters base...
In-Cheol Park, Hyeong-Ju Kang
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 4 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
ICCAD
2002
IEEE
149views Hardware» more  ICCAD 2002»
14 years 4 months ago
Gate sizing using Lagrangian relaxation combined with a fast gradient-based pre-processing step
─ In this paper, we present Forge, an optimal algorithm for gate sizing using the Elmore delay model. The algorithm utilizes Lagrangian relaxation with a fast gradient-based pre-...
Hiran Tennakoon, Carl Sechen
ISMIS
1994
Springer
14 years 7 hour ago
Distributed Multi-Agent Probabilistic Reasoning With Bayesian Networks
Main stream approaches in distributed artificial intelligence (DAI) are essentially logic-based. Little has been reported to explore probabilistic approach in DAI. On the other han...
Yang Xiang
JAL
2008
74views more  JAL 2008»
13 years 8 months ago
Solving satisfiability in the tile assembly model with a constant-size tileset
Biological systems are far more complex and robust than systems we can engineer today. One way to increase the complexity and robustness of our engineered systems is to study how ...
Yuriy Brun