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DFT
2003
IEEE
113views VLSI» more  DFT 2003»
14 years 2 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
HT
2000
ACM
14 years 1 months ago
Making a successful case for a hypertextual doctoral dissertation
In August of 1998 I completed the first hypertextual dissertation at Rensselaer Polytechnic Institute. The dissertation was a case study applying methods of rhetorical analysis an...
Christine Boese
AGP
1998
IEEE
14 years 1 months ago
Factorizing Equivalent Variable Pairs in ROBDD-Based Implementations of Pos
The subject of groundness analysis for (constraint) logic programs has been widely studied, and interesting domains have been proposed. Pos has been recognized as the most suitabl...
Roberto Bagnara, Peter Schachte
MOBIHOC
2006
ACM
14 years 2 months ago
Wakeup scheduling in wireless sensor networks
A large number of practical sensing and actuating applications require immediate notification of rare but urgent events and also fast delivery of time sensitive actuation command...
Abtin Keshavarzian, Huang Lee, Lakshmi Venkatraman
COMPSAC
2010
IEEE
13 years 6 months ago
Representing and Reasoning about Web Access Control Policies
The advent of emerging technologies such as Web services, service-oriented architecture, and cloud computing has enabled us to perform business services more efficiently and effect...
Gail-Joon Ahn, Hongxin Hu, Joohyung Lee, Yunsong M...