Sciweavers

2861 search results - page 570 / 573
» Constraint Programming
Sort
View
CN
2010
91views more  CN 2010»
13 years 6 months ago
ILP formulations for non-simple p-cycle and p-trail design in WDM mesh networks
Conventional simple p-cycle (Preconfigured Protection Cycle) concept allows fast and capacity-efficient span protection in WDM mesh networks. Unlike simple p-cycle, non-simple p-cy...
Bin Wu, Kwan L. Yeung, Pin-Han Ho
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 6 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
NAACL
2010
13 years 6 months ago
Enabling Monolingual Translators: Post-Editing vs. Options
We carried out a study on monolingual translators with no knowledge of the source language, but aided by post-editing and the display of translation options. On Arabic-English and...
Philipp Koehn
CORR
2010
Springer
160views Education» more  CORR 2010»
13 years 5 months ago
Routing with Mutual Information Accumulation in Wireless Networks
We investigate optimal routing and scheduling strategies for multi-hop wireless networks with rateless codes. Rateless codes allow each node of the network to accumulate mutual in...
Rahul Urgaonkar, Michael J. Neely
JCO
2011
115views more  JCO 2011»
13 years 3 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu