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FASE
2009
Springer
15 years 11 months ago
Controller Synthesis from LSC Requirements
Live Sequence Charts (LSCs) is a visual requirements language for specifying reactive system behavior. When modeling and designing open reactive systems, it is often essential to h...
Hillel Kugler, Cory Plock, Amir Pnueli
FPGA
2009
ACM
148views FPGA» more  FPGA 2009»
15 years 11 months ago
SmartOpt: an industrial strength framework for logic synthesis
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research i...
Stephen Jang, Dennis Wu, Mark Jarvin, Billy Chan, ...
ICNC
2009
Springer
15 years 11 months ago
Reducing Boarding Time: Synthesis of Improved Genetic Algorithms
—With the aim to minimize boarding time and devise procedures for boarding strategies, this paper develop the synthesis of Improved Genetic Algorithms and simulation. This paper ...
Kang Wang
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
15 years 9 months ago
A novel improvement technique for high-level test synthesis
Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iter...
Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jaha...
ESOP
2003
Springer
15 years 9 months ago
Using Controller-Synthesis Techniques to Build Property-Enforcing Layers
In complex systems, like robot plants, applications are built on top of a set of components, or devices. Each of them has particular individual constraints, and there are also log...
Karine Altisen, Aurélie Clodic, Florence Ma...