We are interested in the design of automated procedures for analyzing the (in)security of cryptographic protocols in the Dolev-Yao model for a bounded number of sessions when we t...
The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partia...
This paper introduces a new algorithm for solving a subclass of quantified constraint satisfaction problems (QCSP) where existential quantifiers precede universally quantified ine...
Alexandre Goldsztejn, Claude Michel, Michel Rueher
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
During the design iterations of embedded systems, the schedulability analysis is an important method to verify whether the real-time constraints are satisfied. In order to achieve...
Steffen Kollmann, Victor Pollex, Kilian Kempf, Fra...