A tree-like substructure on a computer chip whose task it is to carry a signal from a source circuit to possibly many sink circuits and which consists only of wires and so-called ...
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla...
A new evolutionary method named “Genetic Network Programming with Control Nodes, GNPcn” has been proposed and applied to determine the timing of buying and selling stocks. GNP...
Etsushi Ohkawa, Yan Chen, Shingo Mabu, Kaoru Shima...
In this paper, a simple and effective tool for the design of low-density parity-check (LDPC) codes for iterative correction of bursts of erasures is presented. The design method co...
Background: Direct synthesis of genes is rapidly becoming the most efficient way to make functional genetic constructs and enables applications such as codon optimization, RNAi re...
Alan Villalobos, Jon E. Ness, Claes Gustafsson, Je...