Sciweavers

47 search results - page 8 / 10
» Constructing and exploiting linear schedules with prescribed...
Sort
View
DSD
2002
IEEE
90views Hardware» more  DSD 2002»
14 years 14 days ago
Simplifying Instruction Issue Logic in Superscalar Processors
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
Toshinori Sato, Itsujiro Arita
ASIACRYPT
2009
Springer
14 years 2 months ago
Rebound Attack on the Full Lane Compression Function
In this work, we apply the rebound attack to the AES based SHA-3 candidate Lane. The hash function Lane uses a permutation based compression function, consisting of a linear messag...
Krystian Matusiewicz, María Naya-Plasencia,...
TSP
2010
13 years 2 months ago
Steady-state MSE performance analysis of mixture approaches to adaptive filtering
In this paper, we consider mixture approaches that adaptively combine outputs of several parallel running adaptive algorithms. These parallel units can be considered as diversity b...
Suleyman Serdar Kozat, Alper T. Erdogan, Andrew C....
EUROPAR
2009
Springer
14 years 4 days ago
Automatic Calibration of Performance Models on Heterogeneous Multicore Architectures
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
Cédric Augonnet, Samuel Thibault, Raymond N...
HCW
1999
IEEE
13 years 11 months ago
Multiple Cost Optimization for Task Assignment in Heterogeneous Computing Systems Using Learning Automata
A framework for task assignment in heterogeneous computing systems is presented in this work. The framework is based on a learning automata model. The proposed model can be used f...
Raju D. Venkataramana, N. Ranganathan