Sciweavers

822 search results - page 22 / 165
» Contention in shared memory algorithms
Sort
View
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
13 years 11 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
IPPS
2006
IEEE
14 years 1 months ago
Detecting phases in parallel applications on shared memory architectures
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
Erez Perelman, Marzia Polito, Jean-Yves Bouguet, J...
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
13 years 11 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
PLDI
1995
ACM
13 years 11 months ago
Unifying Data and Control Transformations for Distributed Shared Memory Machines
We present a unified approach to locality optimization that employs both data and control transformations. Data transformations include changing the array layout in memory. Contr...
Michal Cierniak, Wei Li
ICDCS
2000
IEEE
13 years 11 months ago
Graceful Quorum Reconfiguration in a Robust Emulation of Shared Memory
Providing shared-memory abstraction in messagepassing systems often simplifies the development of distributed algorithms and allows for the reuse of sharedmemory algorithms in the...
Burkhard Englert, Alexander A. Shvartsman