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ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
14 years 18 days ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
CVPR
2008
IEEE
14 years 9 months ago
FusionFlow: Discrete-continuous optimization for optical flow estimation
Accurate estimation of optical flow is a challenging task, which often requires addressing difficult energy optimization problems. To solve them, most top-performing methods rely ...
Victor S. Lempitsky, Stefan Roth, Carsten Rother
SENSYS
2010
ACM
13 years 5 months ago
The Jigsaw continuous sensing engine for mobile phone applications
Supporting continuous sensing applications on mobile phones is challenging because of the resource demands of long-term sensing, inference and communication algorithms. We present...
Hong Lu, Jun Yang, Zhigang Liu, Nicholas D. Lane, ...
HPCA
2001
IEEE
14 years 8 months ago
A Delay Model and Speculative Architecture for Pipelined Routers
This paper introduces a router delay model that accurately models key aspects of modern routers. The model accounts for the pipelined nature of contemporary routers, the specific ...
Li-Shiuan Peh, William J. Dally
IPPS
2007
IEEE
14 years 2 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones