242 search results - page 41 / 49 » Contouring for Power Systems Using Graphical Processing Unit... |
RTAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
ECBS
1996
IEEE
13 years 11 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
ISPASS
2010
IEEE
14 years 2 months ago
2010
IEEE
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
INFOCOM
2009
IEEE
14 years 2 months ago
2009
IEEE
—While it is a well known result that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its...