Sciweavers

1239 search results - page 121 / 248
» Control Generation for Logic Programs
Sort
View
DFT
2003
IEEE
113views VLSI» more  DFT 2003»
14 years 1 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
HICSS
2008
IEEE
105views Biometrics» more  HICSS 2008»
13 years 8 months ago
Evaluating the Effect of Upgrade, Control and Development Strategies on Robustness and Failure Risk of the Power Transmission Gr
We use the OPA complex systems model of the power transmission system to investigate the effect of a series of different network upgrade scenarios on the long time dynamics and th...
David E. Newman, Benjamin A. Carreras, Vickie E. L...
SP
2005
IEEE
149views Security Privacy» more  SP 2005»
14 years 1 months ago
Distributed Proving in Access-Control Systems
We present a distributed algorithm for assembling a proof that a request satisfies an access-control policy expressed in a formal logic, in the tradition of Lampson et al. [16]. ...
Lujo Bauer, Scott Garriss, Michael K. Reiter
FAABS
2004
Springer
14 years 1 months ago
Towards Timed Automata and Multi-agent Systems
Abstract. The design of reactive systems must comply with logical correctness (the system does what it is supposed to do) and timeliness (the system has to satisfy a set of tempora...
Guillaume Hutzler, Hanna Klaudel, D. Yue Wang
SIGSOFT
2003
ACM
14 years 8 months ago
Protecting C programs from attacks via invalid pointer dereferences
Writes via unchecked pointer dereferences rank high among vulnerabilities most often exploited by malicious code. The most common attacks use an unchecked string copy to cause a b...
Suan Hsi Yong, Susan Horwitz