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CONPAR
1994
13 years 12 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
INFOCOM
2012
IEEE
11 years 10 months ago
Jointly optimal bit loading, channel pairing and power allocation for multi-channel relaying
Abstract—We aim to enhance the end-to-end rate of a general dual-hop relay network with multiple channels and finite modulation formats, by jointly optimizing channel pairing, p...
Mahdi Hajiaghayi, Min Dong, Ben Liang
ASAP
2007
IEEE
144views Hardware» more  ASAP 2007»
14 years 2 months ago
A High-Throughput Programmable Decoder for LDPC Convolutional Codes
In this paper, we present and analyze a novel decoder architecture for LDPC convolutional codes (LDPCCCs). The proposed architecture enables high throughput and can be programmed ...
Marcel Bimberg, Marcos B. S. Tavares, Emil Mat&uac...
LCPC
2007
Springer
14 years 1 months ago
Communicating Multiprocessor-Tasks
The use of multiprocessor tasks (M-tasks) has been shown to be successful for mixed task and data parallel implementations of algorithms from scientific computing. The approach o...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...
CP
2006
Springer
13 years 11 months ago
Distributed Constraint-Based Local Search
Distributed computing is increasingly important at a time when the doubling of the number of transistors on a processor every 18 months no longer translates in a doubling of speed ...
Laurent Michel, Andrew See, Pascal Van Hentenryck