ASAP 2007 - PDF Preprint Papers

ASAP 2007 Architectures and Processors Application-Specific Systems

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed ASAP-2007 Paper

click to vote

ASAP
2007
IEEE

219views Hardware» more ASAP 2007»

SIMD Vectorization of Histogram Functions

14 years 6 months ago

Download ce.et.tudelft.nl

Existing SIMD extensions cannot efﬁciently vectorize the histogram function due to memory collisions. We propose two techniques to avoid this problem. In the ﬁrst, a hierarchi...

Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	219	SIMD Vectorization of Histogram Functions	claim
2	203	Reconfigurable Universal Adder	claim
3	175	Scalable Multi-FPGA Platform for Networks-On-Chip Emulation	claim
4	169	Reduced Delay BCD Adder	claim
5	157	Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations	claim
6	153	Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics	claim
7	150	Customizing Reconfigurable On-Chip Crossbar Scheduler	claim
8	144	A High-Throughput Programmable Decoder for LDPC Convolutional Codes	claim
9	136	0/1 Knapsack on Hardware: A Complete Solution	claim
10	135	An Application Specific Memory Characterization Technique for Co-processor Accelerators	claim
11	135	An Efficient SIMD Architecture with Parallel Memory for 2D Cosine Transforms of Video Coding	claim
12	134	Real-time FPGA-implementation for blue-sky Detection	claim
13	134	Methodology and Toolset for ASIP Design and Development Targeting Cryptography-Based Applications	claim
14	133	GISP: A Transparent Superpage Support Framework for Linux	claim
15	133	An Efficient Hardware Support for Control Data Validation	claim
16	130	A Self-Reconfigurable Implementation of the JPEG Encoder	claim
17	126	Evaluation of a High-Level-Language Methodology for High-Performance Reconfigurable Computers	claim
18	123	A memcpy Hardware Accelerator Solution for Non Cache-line Aligned Copies	claim
19	123	Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors	claim
20	122	Parallelizing HMMER for Hardware Acceleration on FPGAs	claim
21	118	Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers	claim
22	116	The Design of a Novel Object-oriented Processor : OOMIPS	claim
23	112	Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis	claim
24	111	Entropy Coding on a Programmable Processor Array for Multimedia SoC	claim
25	109	Long Live Small Fan-in Majority Gates Their Reign Looks Like Coming!	claim
26	107	A Hardware-Oriented Method for Evaluating Complex Polynomials	claim
27	104	Hardware Acceleration for 3-D Radiation Dose Calculation	claim
28	101	Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit	claim
29	97	FPGA-Based Efficient Design Approach for Large-Size Two's Complement Squarers	claim
30	95	Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router	claim
31	93	LNS Subtraction Using Novel Cotransformation and/or Interpolation	claim
32	91	Mapping and Topology Customization Approaches for Application-Specific STNoC Designs	claim
33	85	Windowed FIFOs for FPGA-based Multiprocessor Systems	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers