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» Controlled-Load Limited Switch Dynamic Logic Circuit
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FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 11 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
ICDE
2012
IEEE
199views Database» more  ICDE 2012»
11 years 10 months ago
Physically Independent Stream Merging
—A facility for merging equivalent data streams can support multiple capabilities in a data stream management system (DSMS), such as query-plan switching and high availability. O...
Badrish Chandramouli, David Maier, Jonathan Goldst...
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 8 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
SLIP
2005
ACM
14 years 1 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
ICCAD
2007
IEEE
139views Hardware» more  ICCAD 2007»
14 years 1 months ago
Using functional independence conditions to optimize the performance of latency-insensitive systems
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
Cheng-Hong Li, Luca P. Carloni