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» Controlling data disclosure in computational PIR protocols
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CF
2006
ACM
13 years 11 months ago
An efficient cache design for scalable glueless shared-memory multiprocessors
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
Alberto Ros, Manuel E. Acacio, José M. Garc...
ICDCS
2010
IEEE
13 years 11 months ago
B-SUB: A Practical Bloom-Filter-Based Publish-Subscribe System for Human Networks
—The adoption of portable wireless devices is rapidly rising. The demand for efficient communication protocols amongst these devices is pressing. In this paper, we present a con...
Yaxiong Zhao, Jie Wu
SC
1995
ACM
13 years 11 months ago
Architectural Mechanisms for Explicit Communication in Shared Memory Multiprocessors
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
Umakishore Ramachandran, Gautam Shah, Anand Sivasu...
BMCBI
2007
103views more  BMCBI 2007»
13 years 7 months ago
Dynamic simulation of regulatory networks using SQUAD
Background: The ambition of most molecular biologists is the understanding of the intricate network of molecular interactions that control biological systems. As scientists uncove...
Alessandro Di Cara, Abhishek Garg, Giovanni De Mic...
PAMI
2006
186views more  PAMI 2006»
13 years 7 months ago
Performance Evaluation of Fingerprint Verification Systems
This paper is concerned with the performance evaluation of fingerprint verification systems. After an initial classification of biometric testing initiatives, we explore both the t...
Raffaele Cappelli, Dario Maio, Davide Maltoni, Jam...