548 search results - page 2 / 110 » Core-Selectability in Chip Multiprocessors |
PDP
2011
IEEE
13 years 2 months ago
2011
IEEE
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
ICS
2011
Tsinghua U.
13 years 2 months ago
2011
Tsinghua U.
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
ICCD
2011
IEEE
12 years 10 months ago
2011
IEEE
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
HIPEAC
2011
Springer
12 years 10 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
MICRO
2000
IEEE
13 years 10 months ago
2000
IEEE
dards, language abstraction continues unabatrpretation of such high-level abstract languages requires high performance. The MP98 low-power, high-performance microprocessor architec...