548 search results - page 36 / 110 » Core-Selectability in Chip Multiprocessors |
140
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NOCS
2008
IEEE
15 years 10 months ago
2008
IEEE
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
127
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DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
73
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
119
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ISCA
2007
IEEE
15 years 10 months ago
2007
IEEE
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...