We present an extension of the DLVHEX system to support RIF-Core, a dialect of W3C’s Rule Interchange Format (RIF), as well as combinations of RIF-Core and OWL2RL ontologies. DLV...
The growing ubiquity of cameras in hand-held devices and the prevalence of electronic displays in signage creates a novel framework for wireless communications. Traditionally, the...
Wenjia Yuan, Kristin J. Dana, Ashwin Ashok, Marco ...
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
In this paper, we introduce Optimus: an optimizing synthesis compiler for streaming applications. Optimus compiles programs written in a high level streaming language to either so...
Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, D...
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...