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RTCSA
2007
IEEE
14 years 3 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
ICSE
2007
IEEE-ACM
14 years 3 months ago
Architecture Knowledge Management: Challenges, Approaches, and Tools
Capturing the technical knowledge, contextual information, and rationale surrounding the design decisions underpinning system architectures can greatly improve the software develo...
Muhammad Ali Babar, Ian Gorton
IESS
2007
Springer
128views Hardware» more  IESS 2007»
14 years 3 months ago
An Interactive Design Environment for C-based High-Level Synthesis
: Much effort in RTL design has been devoted to developing “push-button” types of tools. However, given the highly complex nature, and lack of control on RTL design, push-butt...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
ETS
2006
IEEE
108views Hardware» more  ETS 2006»
14 years 3 months ago
A DFT Architecture for Asynchronous Networks-on-Chip
The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...
Xuan-Tu Tran, Jean Durupt, François Bertran...
GMP
2006
IEEE
137views Solid Modeling» more  GMP 2006»
14 years 3 months ago
Theoretically Based Robust Algorithms for Tracking Intersection Curves of Two Deforming Parametric Surfaces
Abstract. This paper presents the mathematical framework, and develops algorithms accordingly, to continuously and robustly track the intersection curves of two deforming parametri...
Xianming Chen, Richard F. Riesenfeld, Elaine Cohen...