Sciweavers

1113 search results - page 176 / 223
» Counter Systems for Data Logics
Sort
View
JCB
2006
185views more  JCB 2006»
15 years 4 months ago
A Probabilistic Methodology for Integrating Knowledge and Experiments on Biological Networks
Biological systems are traditionally studied by focusing on a specific subsystem, building an intuitive model for it, and refining the model using results from carefully designed ...
Irit Gat-Viks, Amos Tanay, Daniela Raijman, Ron Sh...
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 8 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
213
Voted
CORR
2004
Springer
177views Education» more  CORR 2004»
15 years 4 months ago
Typestate Checking and Regular Graph Constraints
We introduce regular graph constraints and explore their decidability properties. The motivation for regular graph constraints is 1) type checking of changing types of objects in ...
Viktor Kuncak, Martin C. Rinard
166
Voted
POPL
2012
ACM
14 years 3 days ago
Programming with binders and indexed data-types
We show how to combine a general purpose type system for an existing language with support for programming with binders and contexts by refining the type system of ML with a rest...
Andrew Cave, Brigitte Pientka
142
Voted
CSREAESA
2006
15 years 6 months ago
Design and Implementation of SoPC with Multi-Bus on a Chip
SoPC (System on a Programmable Chip) is one important kind of SoC solution based on PLD (Programmable Logic Device). At the same time, PBD (Platform-based Design) has become popul...
Fangjun Jian, Jizhong Han, Chengde Han, Qin Zhang,...