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» Criteria for the evaluation of implemented architectures
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IPPS
2007
IEEE
14 years 3 months ago
Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems
Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a n...
Nazish Aslam, Mark Milward, Ioannis Nousias, Tughr...
GECCO
2007
Springer
187views Optimization» more  GECCO 2007»
14 years 3 months ago
Defining implicit objective functions for design problems
In many design tasks it is difficult to explicitly define an objective function. This paper uses machine learning to derive an objective in a feature space based on selected examp...
Sean Hanna
CODES
2006
IEEE
14 years 3 months ago
Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability
Reliability in embedded processors can be improved by control flow checking and such checking can be conducted using software or hardware. Proposed software-only approaches suffe...
Roshan G. Ragel, Sri Parameswaran
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
14 years 3 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
14 years 3 months ago
Design and test of fixed-point multimedia co-processor for mobile applications
: In this research, a fixed-point multimedia co-processor is designed and tested into an ARM-10 based mobile graphics processor for portable 2-D and 3-D multimedia applications. Th...
Ju-Ho Sohn, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo