Sciweavers

1477 search results - page 204 / 296
» Criteria for the evaluation of implemented architectures
Sort
View
APPT
2009
Springer
13 years 11 months ago
Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs
Abstract. In many-core CMP architectures, the cache coherence protocol is a key component since it can add requirements of area and power consumption to the final design and, there...
Alberto Ros, Manuel E. Acacio, José M. Garc...
CGO
2004
IEEE
13 years 11 months ago
Software-Controlled Operand-Gating
Operand gating is a technique for improving processor energy efficiency by gating off sections of the data path that are unneeded by short-precision (narrow) operands. A method fo...
Ramon Canal, Antonio González, James E. Smi...
HICSS
2000
IEEE
124views Biometrics» more  HICSS 2000»
13 years 11 months ago
An Empirical Study of Distribution based on Voyager: A Performance Analysis
The paper describes the model, implementation and experimental evaluation of a distributed Kohonen Neural Network application (Kohonen Application). The aim of this research is to...
Sérgio Viademonte, Frada Burstein, Fá...
ICRA
1995
IEEE
188views Robotics» more  ICRA 1995»
13 years 11 months ago
Fast Approximation of Range Images by Triangular Meshes Generated through Adaptive Randomized Sampling
This paper describes and evaluates an efficient technique that allows the fast generation of 3D triangular meshes from range images avoiding optimization procedures. Such a tool ...
Miguel Angel García
FTCS
1993
123views more  FTCS 1993»
13 years 9 months ago
Fast, On-Line Failure Recovery in Redundant Disk Arrays
This paper describes and evaluates two algorithms for performing on-line failure recovery (data reconstruction) in redundant disk arrays. It presents an implementation of disk-ori...
Mark Holland, Garth A. Gibson, Daniel P. Siewiorek