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» Criteria for the evaluation of implemented architectures
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ICLP
2003
Springer
14 years 25 days ago
Flow Java: Declarative Concurrency for Java
Abstract. Logic variables pioneered by (concurrent) logic and concurrent constraint programming are powerful mechanisms for automatically synchronizing concurrent computations. The...
Frej Drejhammar, Christian Schulte, Per Brand, Sei...
ICMI
2003
Springer
133views Biometrics» more  ICMI 2003»
14 years 25 days ago
Mouthbrush: drawing and painting by hand and mouth
We present a novel multimodal interface which permits users to draw or paint using coordinated gestures of hand and mouth. A headworn camera captures an image of the mouth and the...
Chi-Ho Chan, Michael J. Lyons, Nobuji Tetsutani
DATE
2010
IEEE
165views Hardware» more  DATE 2010»
14 years 22 days ago
Multicore soft error rate stabilization using adaptive dual modular redundancy
— The use of dynamic voltage and frequency scaling (DVFS) in contemporary multicores provides significant protection from unpredictable thermal events. A side effect of DVFS can ...
Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson...
ISCA
2002
IEEE
108views Hardware» more  ISCA 2002»
14 years 17 days ago
The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays
Microprocessor clock frequency has improved by nearly 40% annually over the past decade. This improvement has been provided, in equal measure, by smaller technologies and deeper p...
M. S. Hrishikesh, Doug Burger, Stephen W. Keckler,...
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
14 years 17 days ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith