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    TCAD
    2008
    120views more  TCAD 2008»
    Charge Recycling in Power-Gated CMOS Circuits
    13 years 7 months ago
    Charge Recycling in Power-Gated CMOS Circuits
    Download  atrak.usc.edu
    Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
    Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram
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    GLVLSI
    2007
    IEEE
    173views VLSI» more  GLVLSI 2007»
    Modeling and estimating leakage current in series-parallel CMOS networks
    13 years 7 months ago
    Modeling and estimating leakage current in series-parallel CMOS networks
    Download  www.inf.ufrgs.br
    This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
    Paulo F. Butzen, André Inácio Reis, ...
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    ISLPED
    1995
    ACM
    129views Hardware» more  ISLPED 1995»
    CMOS dynamic power estimation based on collapsible current source transistor modeling
    13 years 10 months ago
    CMOS dynamic power estimation based on collapsible current source transistor modeling
    Download  www.cecs.uci.edu
    When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
    Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Pet...
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    VLSID
    2007
    IEEE
    152views VLSI» more  VLSID 2007»
    An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect
    14 years 7 months ago
    An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect
    Download  www-unix.ecs.umass.edu
    With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
    Ashesh Rastogi, Wei Chen, Alodeep Sanyal, Sandip K...
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    ASPDAC
    1999
    ACM
    123views Hardware» more  ASPDAC 1999»
    Estimation of Peak Current through CMOS VLSI Circuit Supply Lines
    13 years 11 months ago
    Estimation of Peak Current through CMOS VLSI Circuit Supply Lines
    Download  www.cecs.uci.edu
    Toshio Murayama, Kimihiro Ogawa, Haruhiko Yamaguch...
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