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RTCSA
2009
IEEE
16 years 20 days ago
Managing Imprecise Worst Case Execution Times on DVFS Platforms
Abstract—Although energy-efficient real-time task scheduling has attracted a lot of attention in the past decade, most existing results assumed deterministic execution lengths f...
Vandy Berten, Chi-Ju Chang, Tei-Wei Kuo
TCAD
2008
119views more  TCAD 2008»
15 years 5 months ago
Energy and Performance Optimization of Demand Paging With OneNAND Flash
New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, pe...
Yongsoo Joo, Yongseok Choi, Jaehyun Park, Chanik P...
MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
15 years 10 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
139
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ISLPED
2009
ACM
188views Hardware» more  ISLPED 2009»
16 years 14 days ago
Transaction-based adaptive dynamic voltage scaling for interactive applications
In an interactive embedded system, special task execution patterns and scheduling constraints exist due to frequent human-computer interactions. This paper proposes a transaction-...
Xia Zhao, Yao Guo, Xiangqun Chen
WMPI
2004
ACM
15 years 11 months ago
Compiler-optimized usage of partitioned memories
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
Lars Wehmeyer, Urs Helmig, Peter Marwedel