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RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
14 years 2 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
RTSS
2005
IEEE
14 years 2 months ago
Tardiness Bounds under Global EDF Scheduling on a Multiprocessor
We consider the scheduling of a sporadic real-time task system on an identical multiprocessor. Though Pfair algorithms are theoretically optimal for such task systems, in practice...
UmaMaheswari C. Devi, James H. Anderson
SBACPAD
2005
IEEE
176views Hardware» more  SBACPAD 2005»
14 years 2 months ago
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kuri...
SSDBM
2005
IEEE
100views Database» more  SSDBM 2005»
14 years 2 months ago
An Information Theoretic Model for Database Alignment
As with many large organizations, the Government's data is split in many different ways and is collected at different times by different people. The resulting massive data he...
Patrick Pantel, Andrew Philpot, Eduard H. Hovy
TRIDENTCOM
2005
IEEE
14 years 2 months ago
Divide and Conquer: PC-Based Packet Trace Replay at OC-48 Speeds
Today’s Internet backbone networking devices need to be tested under realistic traffic conditions at transmission rates of OC-48 and above. While commercially available synthet...
Tao Ye, Darryl Veitch, Gianluca Iannaccone, Suprat...
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