27 search results - page 5 / 6 » DRAM Energy Management Using Software and Hardware Directed ... |
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
OSDI
2002
ACM
14 years 7 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
CODES
2008
IEEE
14 years 1 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
HPCA
2006
IEEE
14 years 7 months ago
2006
IEEE
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...