Abstract. In this paper, we present our initial design and implementation of a declarative network verifier (DNV). DNV utilizes theorem proving, a well established verification tec...
This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
This paper introduces a repeatable and constructive approach to the analysis of loop progress and termination conditions in imperative programs. It is applicable to all loops for ...
Abstract This paper describes a general framework for automatic termination analysis of logic programs, where we understand by termination" the niteness of the LD-tree constru...
During the last decade, software transactional memory (STM) gained wide popularity in many areas of parallel computing. In this paper, we introduce LISP-derived language equipped ...