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HPDC
2007
IEEE
14 years 3 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
SIBGRAPI
1999
IEEE
14 years 1 months ago
Parallelizing MPEG Video Encoding using Multiprocessors
Many computer applications are currently using digital video. Recent advances in digital imaging and faster networking infrastructure made this technology very popular, not only fo...
Joao Paulo Kitajima, Denilson Barbosa, Wagner Meir...
JPDC
2000
106views more  JPDC 2000»
13 years 8 months ago
Dual of a Complete Graph as an Interconnection Network
A new class of interconnection networks, the hypernetworks, has been proposed recently. Hypernetworks are characterized by hypergraphs. Compared with point-to-point networks, they...
Si-Qing Zheng, Jie Wu
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
14 years 1 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus
ISPASS
2010
IEEE
13 years 6 months ago
Weak execution ordering - exploiting iterative methods on many-core GPUs
Abstract--On NVIDIA's many-core GPUs, there is no synchronization function among parallel thread blocks. When finegranularity of data communication and synchronization is requ...
Jianmin Chen, Zhuo Huang, Feiqi Su, Jih-Kwon Peir,...