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» Data Criticality in Network-On-Chip Design
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VLDB
2002
ACM
108views Database» more  VLDB 2002»
15 years 4 months ago
Energy-performance trade-offs for spatial access methods on memory-resident data
Abstract. The proliferation of mobile and pervasive computing devices has brought energy constraints into the limelight. Energy-conscious design is important at all levels of syste...
Ning An, Sudhanva Gurumurthi, Anand Sivasubramania...
IEEEARES
2007
IEEE
15 years 10 months ago
Using Privacy Process Patterns for Incorporating Privacy Requirements into the System Design Process
In the online world every person has to hold a number of different data sets so as to be able to have access to various e-services and take part in specific economical and social ...
Christos Kalloniatis, Evangelia Kavakli, Stefanos ...
TVCG
2012
184views Hardware» more  TVCG 2012»
13 years 6 months ago
Output-Sensitive Construction of Reeb Graphs
—The Reeb graph of a scalar function represents the evolution of the topology of its level sets. This paper describes a near-optimal output-sensitive algorithm for computing the ...
Harish Doraiswamy, Vijay Natarajan
IWNAS
2006
IEEE
15 years 10 months ago
A Fast Read/Write Process to Reduce RDMA Communication Latency
RDMA reduces network latency by eliminating unnecessary copies from network interface cards to application buffers, but how to reduce memory registration cost is a challenge. Prev...
Li Ou, Jizhong Han
DATE
1997
IEEE
124views Hardware» more  DATE 1997»
15 years 8 months ago
A controller testability analysis and enhancement technique
This paper presents a testability analysis and improvement technique for the controller of an RT level design. It detects hard-to-reachstates by analyzing both the data path and t...
Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo...