A controller testability analysis and enhancement technique

This paper presents a testability analysis and improvement technique for the controller of an RT level design. It detects hard-to-reachstates by analyzing both the data path and the controller of a design. The controller is modijied using register initialization, branch control, and loop termination methods to enhance its state reachability. Thistechnique complements the data path scan method and can be used to avoid scanning registers involved in the critical paths. Experimental results show the improvement offault coverage with a very low area overhead.

• Type: Conference
• Year: 1997
• Where: DATE
• Authors: Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo Peng
• Keywords: Data Path, Data Path Scan, DATE 1997, Hardware, RT Level Design