Sciweavers

1368 search results - page 263 / 274
» Data Engineering for the Analysis of Semiconductor Manufactu...
Sort
View
CODES
2007
IEEE
14 years 3 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
ACMICEC
2005
ACM
175views ECommerce» more  ACMICEC 2005»
14 years 2 months ago
A theoretic discussion of tourism e-commerce
This paper presents the model of e-market structure and process analysis of tourism e-commerce. First the tourism e-commerce status quo is given clearly; secondly e-commerce and i...
Si-qing Liu
ASPLOS
1989
ACM
14 years 23 days ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
ICDE
1998
IEEE
108views Database» more  ICDE 1998»
14 years 10 months ago
Efficient Discovery of Functional and Approximate Dependencies Using Partitions
Discovery of functionaldependencies from relations has been identified as an important database analysis technique. In this paper, we present a new approach for finding functional...
Ykä Huhtala, Juha Kärkkäinen, Pasi ...
PARA
2000
Springer
14 years 8 days ago
JavaGrande - High Performance Computing with Java
The JavaGrande Forum is a group of users, researchers, and interested parties from industry. The Forum members are either trying to use Java for resource-intensive applications or ...
Michael Philippsen, Ronald F. Boisvert, Vladimir G...