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ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
14 years 3 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...
ICMCS
2007
IEEE
144views Multimedia» more  ICMCS 2007»
14 years 3 months ago
A Framework for Modular Signal Processing Systems with High-Performance Requirements
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
Lukas Diduch, Ronald Müller, Gerhard Rigoll
ICDM
2007
IEEE
131views Data Mining» more  ICDM 2007»
14 years 3 months ago
Parallel Mining of Frequent Closed Patterns: Harnessing Modern Computer Architectures
Inspired by emerging multi-core computer architectures, in this paper we present MT CLOSED, a multi-threaded algorithm for frequent closed itemset mining (FCIM). To the best of ou...
Claudio Lucchese, Salvatore Orlando, Raffaele Pere...
HPCA
2004
IEEE
14 years 9 months ago
Understanding Scheduling Replay Schemes
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
Ilhyun Kim, Mikko H. Lipasti
ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
14 years 1 months ago
A Language for Describing Predictors and Its Application to Automatic Synthesis
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
Joel S. Emer, Nicholas C. Gloy