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HPCA
2006
IEEE
14 years 9 months ago
CORD: cost-effective (and nearly overhead-free) order-recording and data race detection
Chip-multiprocessors are becoming the dominant vehicle for general-purpose processing, and parallel software will be needed to effectively utilize them. This parallel software is ...
Milos Prvulovic
IPPS
2009
IEEE
14 years 3 months ago
Accelerating HMMer on FPGAs using systolic array based architecture
HMMer is a widely-used bioinformatics software package that uses profile HMMs (Hidden Markov Models) to model the primary structure consensus of a family of protein or nucleic aci...
Yanteng Sun, Peng Li, Guochang Gu, Yuan Wen, Yuan ...
HPCA
2009
IEEE
14 years 9 months ago
Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches
In future multi-cores, large amounts of delay and power will be spent accessing data in large L2/L3 caches. It has been recently shown that OS-based page coloring allows a non-uni...
Manu Awasthi, Kshitij Sudan, Rajeev Balasubramonia...
EUROPAR
2008
Springer
13 years 11 months ago
Parallel Lattice Boltzmann Flow Simulation on Emerging Multi-core Platforms
Abstract. A parallel Lattice Boltzmann Method (pLBM), which is based on hierarchical spatial decomposition, is designed to perform large-scale flow simulations. The algorithm uses ...
Liu Peng, Ken-ichi Nomura, Takehiro Oyakawa, Rajiv...
EUROPDS
1997
13 years 10 months ago
A Combined Virtual Shared Memory and Network which Schedules
In this paper, we follow a new path to arrive at the idea of a COMA — a Cache Only Memory Architecture. We show how the evolution of another architecture (ADARC) leads quite nat...
Ronald Moore, Bernd Klauer, Klaus Waldschmidt