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DSD
2006
IEEE
131views Hardware» more  DSD 2006»
14 years 4 days ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
MOC
1998
104views more  MOC 1998»
13 years 8 months ago
Chaos in the Lorenz equations: A computer assisted proof. Part II: Details
Abstract. Details of a new technique for obtaining rigorous results concerning the global dynamics of nonlinear systems is described. The technique abstract existence results based...
Konstantin Mischaikow, Marian Mrozek
CONCURRENCY
2007
95views more  CONCURRENCY 2007»
13 years 8 months ago
Automated and accurate cache behavior analysis for codes with irregular access patterns
Abstract. The memory hierarchy plays an essential role in the performance of current computers, thus good analysis tools that help predict and understand its behavior are required....
Diego Andrade, Manuel Arenaz, Basilio B. Fraguela,...
PDP
2010
IEEE
14 years 3 months ago
Lessons Learnt Porting Parallelisation Techniques for Irregular Codes to NUMA Systems
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
Juan Angel Lorenzo, Juan Carlos Pichel, David LaFr...
ISPASS
2009
IEEE
14 years 3 months ago
Lonestar: A suite of parallel irregular programs
Until recently, parallel programming has largely focused on the exploitation of data-parallelism in dense matrix programs. However, many important application domains, including m...
Milind Kulkarni, Martin Burtscher, Calin Cascaval,...