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IEEEPACT
2009
IEEE
13 years 4 months ago
Region Based Structure Layout Optimization by Selective Data Copying
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
Sandya S. Mannarswamy, Ramaswamy Govindarajan, Ris...
PDCN
2004
13 years 8 months ago
Speculative prefetching of optional locks in distributed systems
We present a family of methods for speeding up distributed locks by exploiting the uneven distribution of both temporal and spatial locality of access behaviour of many applicatio...
Thomas Schöbel-Theuer
ICPADS
2010
IEEE
13 years 5 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
PC
2007
161views Management» more  PC 2007»
13 years 6 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
ICDCS
1991
IEEE
13 years 10 months ago
Supporting the development of network programs
of ‘‘network computers’’ is inherently lessAbstract predictable than that of more traditional distributed memory systems, such as hypercubes [22], since both theFor computa...
Bernd Bruegge, Peter Steenkiste