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» Data partitioning on chip multiprocessors
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HIPEAC
2010
Springer
14 years 6 months ago
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
Yunlian Jiang, Kai Tian, Xipeng Shen
IISWC
2008
IEEE
14 years 4 months ago
PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors
The PARSEC benchmark suite was recently released and has been adopted by a significant number of users within a short amount of time. This new collection of workloads is not yet ...
Christian Bienia, Sanjeev Kumar, Kai Li
VLDB
2005
ACM
113views Database» more  VLDB 2005»
14 years 3 months ago
Optimistic Intra-Transaction Parallelism on Chip Multiprocessors
With the advent of chip multiprocessors, exploiting intra-transaction parallelism is an attractive way of improving transaction performance. However, exploiting intra-transaction ...
Christopher B. Colohan, Anastassia Ailamaki, J. Gr...
IPPS
2007
IEEE
14 years 4 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
IEEEPACT
2005
IEEE
14 years 3 months ago
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
Ilya Ganusov, Martin Burtscher