Sciweavers

1602 search results - page 164 / 321
» Database Architectures for New Hardware
Sort
View
NIXDORF
1992
116views Hardware» more  NIXDORF 1992»
14 years 1 months ago
Programmable Active Memories: A Performance Assessment
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
Patrice Bertin, Didier Roncin, Jean Vuillemin
SIGMOD
2007
ACM
164views Database» more  SIGMOD 2007»
14 years 9 months ago
Fast data stream algorithms using associative memories
The primary goal of data stream research is to develop space and time efficient solutions for answering continuous online summarization queries. Research efforts over the last dec...
Nagender Bandi, Ahmed Metwally, Divyakant Agrawal,...
CIDR
2007
144views Algorithms» more  CIDR 2007»
13 years 10 months ago
Cache-Oblivious Query Processing
We propose a radical approach to relational query processing that aims at automatically and consistently achieving a good performance on any memory hierarchy. We believe this auto...
Bingsheng He, Qiong Luo
HIPEAC
2009
Springer
14 years 3 months ago
Collective Optimization
Abstract. Iterative compilation is an efficient approach to optimize programs on rapidly evolving hardware, but it is still only scarcely used in practice due to a necessity to gat...
Grigori Fursin, Olivier Temam
ISCAS
2008
IEEE
121views Hardware» more  ISCAS 2008»
14 years 3 months ago
A novel flash analog-to-digital converter
—In this paper a new ADC architecture of flash type is proposed. This proposed N-bit flash ADC replaces the (2N -1)-toN encoder with two (2N/2 -1)-to-(N/2) encoders to accomplish...
Chia-Nan Yeh, Yen-Tai Lai