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CGO
2007
IEEE
14 years 3 months ago
Loop Optimization using Hierarchical Compilation and Kernel Decomposition
The increasing complexity of hardware features for recent processors makes high performance code generation very challenging. In particular, several optimization targets have to b...
Denis Barthou, Sébastien Donadio, Patrick C...
ICDCS
2007
IEEE
14 years 3 months ago
Combating Double-Spending Using Cooperative P2P Systems
An electronic cash system allows users to withdraw coins, represented as bit strings, from a bank or broker, and spend those coins anonymously at participating merchants, so that ...
Ivan Osipkov, Eugene Y. Vasserman, Nicholas Hopper...
IEEEPACT
2007
IEEE
14 years 3 months ago
Automatic Correction of Loop Transformations
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
Nicolas Vasilache, Albert Cohen, Louis-Noël P...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
14 years 3 months ago
Novel High-Speed Redundant Binary to Binary converter using Prefix Networks
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
14 years 3 months ago
On-Line Histogram Equalization for Flash ADC
— We present theory, design and measurement results for an on-line histogram equalization algorithm implemented on a 750MS/s 6b flash analog to digital converter in standard 0.3...
Yanyi Liu Wong, Marc H. Cohen, Pamela Abshire