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126
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
In this paper, we introduce a discrete-time model for the complete power supply sub-system that closely approximates the behavior of its circuit-level (i.e., HSpice), continuous-t...
96
Voted
DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit’s intrinsic errors, such as overflow. A method is prop...
132
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
As the CMOS technology scaled down, the horizontal coupling capacitance between adjacent wires plays dominant part in wire load, crosstalk interference becomes a serious problem f...
108
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
In this paper we address the problem of designing very high throughput finite state machines (FSMs). The presence of loops in sequential circuits prevents a straightforward and g...
127
Voted
DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...