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» Debugging UML Designs with Model Checking
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GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
ICSE
2007
IEEE-ACM
14 years 7 months ago
UML/Analyzer: A Tool for the Instant Consistency Checking of UML Models
Large design models contain tens of thousands of model elements. Designers easily get overwhelmed maintaining the consistency of such design models over time. Not only is it hard ...
Alexander Egyed
OSDI
2002
ACM
14 years 7 months ago
Using Model Checking to Debug Device Firmware
Device firmware is a piece of concurrent software that achieves high performance at the cost of software complexity. They contain subtle race conditions that make them difficult t...
Sanjeev Kumar, Kai Li
ISIM
2007
13 years 9 months ago
Verification of Good Design Style of UML Models
Software architecture, and its behavior can be expressed as UML models. Models of complex systems can be also complex and hard to read – they may consists of hundreds of artifact...
Bogumila Hnatkowska
APSEC
2005
IEEE
14 years 1 months ago
Monitoring with Behavior View Diagrams for Debugging
UML sequence diagrams are widely used during requirements analysis and design for specifying the expected message exchanges among a set of objects in various scenarios for the pro...
Donglin Liang, Kai Xu 0002