457 search results - page 30 / 92 » Decay-Usage Scheduling in Multiprocessors |
ICPP
1996
IEEE
13 years 12 months ago
1996
IEEE
Tiling exploits temporal reuse carried by an outer loop of a loop nest to enhance cache locality. Loop skewing is typically required to make tiling legal. This restricts parallelis...
PDPTA
2004
13 years 9 months ago
2004
High-throughput real-time systems require non-standard and costly hardware and software solutions. Modern workstation can represent a credible alternative to develop realtime inte...
SOSP
1989
ACM
13 years 8 months ago
1989
ACM
Shared-memory multiprocessors are frequently used in a timesharing style with multiple parallel applications executing at the same time. In such an environment, where the machine ...
EUROSYS
2007
ACM
14 years 4 months ago
2007
ACM
The major chip manufacturers have all introduced chip multiprocessing (CMP) and simultaneous multithreading (SMT) technology into their processing units. As a result, even low-end...
RTSS
2009
IEEE
14 years 2 months ago
2009
IEEE
—Chip-multiprocessors represent a dominant new shift in the field of processor design. Better utilization of such technology in the real-time context requires coordinated approa...