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DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 2 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
RSP
1999
IEEE
128views Control Systems» more  RSP 1999»
14 years 6 days ago
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems
The advances in the programmable hardware has lead to new architectures where the hardware can be dynamically adapted to the application to gain better performance. There are stil...
Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
ICANNGA
2007
Springer
100views Algorithms» more  ICANNGA 2007»
13 years 11 months ago
Softening Splits in Decision Trees Using Simulated Annealing
Predictions computed by a classification tree are usually constant on axis-parallel hyperrectangles corresponding to the leaves and have strict jumps on their boundaries. The densi...
Jakub Dvorák, Petr Savický
ENGL
2008
118views more  ENGL 2008»
13 years 8 months ago
Hybrid Architecture of Genetic Algorithm and Simulated Annealing
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated Annealing (SA). The proposed architecture achieves ...
Masaya Yoshikawa, Hironori Yamauchi, Hidekazu Tera...
EOR
2008
133views more  EOR 2008»
13 years 8 months ago
Investigating a hybrid simulated annealing and local search algorithm for constrained optimization
Constrained Optimization Problems (COP) often take place in many practical applications such as kinematics, chemical process optimization, power systems and so on. These problems ...
Chandra Sekhar Pedamallu, Linet Özdamar