204 search results - page 10 / 41 » Deconstructing storage arrays |
IJCAI
1989
13 years 8 months ago
1989
Parallel processors offer a very attractive mechanism for the implementation of large neural networks. Problems in the usage of parallel processing in neural computing involve the...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
The storage requirements of the array-dominated and looporganized algorithmic specifications running on embedded systems can be significant. Employing a data memory space much l...
ISCAS
2003
IEEE
14 years 23 days ago
2003
IEEE
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
MSS
2003
IEEE
14 years 23 days ago
2003
IEEE
We present the Block Storage Multi-Protocol Converter (BSMC) software architecture, which is able to translate and manage SCSI commands carried by different SCSI transport protoco...
PDPTA
2004
13 years 8 months ago
2004
Highly available storage uses replication and other redundant storage to recover from a component failure. If parity data calculated from an erasure correcting code is not updated...