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» Defeasible Description Logics
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ATAL
2006
Springer
13 years 11 months ago
Designing agent chips
We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized int...
Insu Song, Guido Governatori
KI
2008
Springer
13 years 8 months ago
Fusing DL Reasoning with HTN Planning
We describe a method for cascading Description Logic (DL) representation and reasoning on the one hand, and HTN action planning on the other. The planning domain description as wel...
Ronny Hartanto, Joachim Hertzberg
LFCS
2009
Springer
14 years 2 months ago
Completeness Results for Memory Logics
Memory logics are a family of modal logics in which standard relational structures are augmented with data structures and additional operations to modify and query these structure...
Carlos Areces, Santiago Figueira, Sergio Mera
JELIA
2004
Springer
14 years 1 months ago
Computing the Least Common Subsumer w.r.t. a Background Terminology
Methods for computing the least common subsumer (lcs) are usually restricted to rather inexpressive Description Logics (DLs) whereas existing knowledge bases are written in very e...
Franz Baader, Baris Sertkaya, Anni-Yasmin Turhan
CADE
2004
Springer
14 years 8 months ago
Sonic - Non-standard Inferences Go OilEd
Sonic1 is the first prototype implementation of non-standard inferences for Description Logics usable via a graphical user interface. The contribution of our implementation is twof...
Anni-Yasmin Turhan, Christian Kissig