48 search results - page 3 / 10 » Defect tolerance for nanocomputer architecture |
TC
2011
13 years 2 months ago
2011
—Mounting concerns over variability, defects and noise motivate a new approach for digital circuitry: stochastic logic, that is to say, logic that operates on probabilistic signa...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
DFT
2007
IEEE
14 years 1 months ago
2007
IEEE
Solid-state image sensors develop in-field defects in all common environments. Experiments have demonstrated the growth of significant quantities of hot-pixel defects that degrade...
FPT
2005
IEEE
14 years 1 months ago
2005
IEEE
As device sizes shrink, FPGAs are increasingly prone to manufacturing defects. The ability to tolerate multiple defects is anticipated to be very important at 45nm and beyond. One...
CASES
2009
ACM
13 years 11 months ago
2009
ACM
In this paper we introduce Resizable Data Composer-Cache (RDC-Cache). This novel cache architecture operates correctly at sub 500 mV in 65 nm technology tolerating large number of...