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» Defect tolerance for nanocomputer architecture
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DFT
2008
IEEE
89views VLSI» more  DFT 2008»
14 years 2 months ago
Fabrication Variations and Defect Tolerance for Nanomagnet-Based QCA
Tolerating defects and fabrication variations will be critical in any system made with devices that have nanometer feature sizes. This paper considers how fabrication variations a...
Michael T. Niemier, Michael Crocker, Xiaobo Sharon...
ET
2007
84views more  ET 2007»
13 years 7 months ago
Built-in Self-test and Defect Tolerance in Molecular Electronics-based Nanofabrics
We propose a built-in self-test (BIST) procedure for nanofabrics implemented using chemically assembled electronic nanotechnology. Several fault detection configurations are prese...
Zhanglei Wang, Krishnendu Chakrabarty
DAC
2004
ACM
14 years 8 months ago
Defect tolerant probabilistic design paradigm for nanotechnologies
Recent successes in the development and self-assembly of nanoelectronic devices suggest that the ability to manufacture dense nanofabrics is on the near horizon. However, the trem...
Margarida F. Jacome, Chen He, Gustavo de Veciana, ...
MICRO
2010
IEEE
111views Hardware» more  MICRO 2010»
13 years 2 months ago
Putting Faulty Cores to Work
Since the non-cache parts of a core are less regular, compared to on-chip caches, tolerating manufacturing defects in the processing core is a more challenging problem. Due to the ...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
ICCAD
2006
IEEE
96views Hardware» more  ICCAD 2006»
14 years 4 months ago
Application-independent defect-tolerant crossbar nano-architectures
Defect tolerance is a major issue in nano computing. In this paper, an application-independent defect tolerant scheme for reconfigurable crossbar nano-architectures is presented....
Mehdi Baradaran Tahoori